Power efficient fast fourier transform ip core - expro plus

Objective: To develop and refine a power efficient Fast Fourier Transform IP Core for FPGA/ASIC implementationDescription: This activity focuses on the design, development and testing of a Fast Fourier Transform (FFT) block to be used in space applications, which is to be developed as a configurable, reusable IP Core. A reusable IP Core is a hardware model, normally described in VHDL, which is fully verified and can be used as a building block in designs for several targets, such as FPGAs from different vendors or as an ASIC, providing savings in mission costs and development times. The developed IP shall be able to solve complex FFT / inverse FFT; convolve and correlate vectors in frequency domain, with a length up to 32768 points, gain and phase correction, filtering, etc. Several applications will benefit from such an IP Core: - Active Microwave Remote Sensing: Radar Onboard Processing, such as SAR Image Formation, RFI Detection, Compression - Passive Microwave Remote Sensing: Hyperspectral Radiometers (channelisation, RFI detection), Compression Although FFT IPs are available commercially, fine spectral resolution together with high sampling rate (e.g. direct conversion) leads to long FFT lengths, which may not be available in commercial IPs. Furthermore, many of these applications require high-throughput, e.g. channelisation, together with real-time constraints. These requirements give raise to needs regarding adequate standardized Input/Output interfaces (such as AXI-Stream buses) as well as efficient FFT architectures, to cope with the throughput. The activity encompasses the following tasks: - Specifications of the FFT IP Core, taking into account the different application needs. - Description of the IP core in VHDL. The IP shall be configurable. - Development of a tool that helps the user configure and generate the IP core based on specific mission requirements. - Verification and Synthesis on relevant space FPGA devices. - Laboratory demonstrator The developed IP core will be offered to future missions and projects as part of the ESA IP Core's portfolio, which already includes a catalogue of more than 20 cores which comprise typical digital functions used in space applications (TMTC, EDAC, SpaceWire, CAN, LEON2-FT, OBDH, etc).Procurement Policy: C(1) = Activity restricted to non-prime contractors (incl. SMEs). For additional information please go to:http://www.esa.int/About_Us/Business_with_ESA/Small_and_Medium_Sized_Enterprises/Opportunities_for_SMEs/Procurement_policy_on_fair_access_for_SMEs_-_the_C1-C4_Clauses.